The invention relates generally to semiconductor devices and integrated circuit fabrication and, in particular, to structures for a field-effect transistor and methods for fabricating a structure for a field-effect transistor.
Complementary-metal-oxide-semiconductor processes may be used to build a combination of p-type and n-type field-effect transistors that are used to construct logic gates and that are also used as active components in other types of circuits, such as switches used in radiofrequency circuits. Field-effect transistors generally include a channel region, a source, a drain, and a gate electrode. When a control voltage exceeding a characteristic threshold voltage is applied to the gate electrode, carrier flow occurs in a channel region between the source and drain to produce a device output current.
Epitaxial semiconductor films may be used to modify the performance of field-effect transistors. For example, an epitaxial semiconductor film can be used to increase the carrier mobility through the channel region by inducing stresses in the channel. For example, in a p-type field-effect transistor, hole mobility can be enhanced by applying a compressive stress to the channel region. One way in which the compressive stress can be applied is by embedding an epitaxial semiconductor material, such as silicon-germanium, at the opposite ends of the channel. The embedded stressors may also operate as a raised source and a raised drain of the field-effect transistor.
The epitaxial semiconductor material of the raised source and drain may be formed by a selective epitaxial growth process in which growth is initiated only from exposed semiconductor surfaces and not from, for example, exposed dielectric surfaces. The selective epitaxial growth process exhibits different growth rates for different crystal planes, which leads to the formation of facets along slow growth planes. For example, the growth rate of epitaxially-grown silicon-germanium in a <100> direction may be greater than the growth rate in a <111> direction, which leads to faceting normal to the <111> direction.
A capping layer of silicon may be formed over the faceted semiconductor material of the raised source and drain. The thickness of the capping layer should be sufficient to promote silicidation in preparation for contact formation. To maintain the selectivity, the process parameters for the epitaxial growth process may be adjusted. However, the adjustments to the process parameters may also result in anisotropic epitaxial growth of the capping layer with a negligible growth rate on the facets, which may lead to the thickness of the capping layer grown on the facets being insufficient to adequately support silicidation.
Improved structures for a field-effect transistor and methods for fabricating a structure for a field-effect transistor are needed.